The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.
History

No history.

cve-icon MITRE

Status: PUBLISHED

Assigner: XEN

Published: 2024-01-05T16:30:57.225Z

Updated: 2024-08-02T16:10:06.955Z

Reserved: 2023-06-01T10:44:17.065Z

Link: CVE-2023-34326

cve-icon Vulnrichment

No data.

cve-icon NVD

Status : Modified

Published: 2024-01-05T17:15:08.637

Modified: 2024-11-21T08:07:01.133

Link: CVE-2023-34326

cve-icon Redhat

No data.